09/25 2026
434
In this year's AI landscape, one keyword is emerging with increasing frequency:
Light.
From NVIDIA and Broadcom driving CPO adoption to domestic companies focusing on silicon photonics and NPO, and the extensive discussions on optical interconnects at this year's WAIC, the competition in AI infrastructure is gradually extending from "single-chip capabilities" to "computing system efficiency."
Recently, this trend has taken another step forward.
Just days before the Cloud Town Conference, Huawei unveiled the Ascend 960 supernode. It is the industry's first supernode to adopt an NPO (Near-Packaged Optics) optical engine, providing computing power support for large-scale model training and inference with tens of trillions of parameters.
This trend becomes even more evident at this year's Cloud Town Conference.
At the event, Alibaba Cloud officially launched its next-generation AI Native supernode server—the Panjiu AL64 distributed SNPO optical interconnect supernode. A key change is the introduction of a Scale-Up-oriented SNPO solution, which will serve as the optical interconnect direction for the next-generation Panjiu supernode servers.
SNPO, in simple terms, pushes optical interconnects further inside the supernode, bringing light closer to the XPU.
More interestingly, this shift is not limited to cloud providers.
While Alibaba is building its next-generation supernode interconnect architecture around SNPO, Proximar, a leading domestic silicon photonics AI chip design company, also showcased its SNPO products for XPU Scale-Up at the Cloud Town Conference.
From Huawei being the first to integrate NPO into supernodes, to Alibaba advancing SNPO, and upstream vendors starting to launch corresponding products, these developments collectively send a clear signal:
Light is moving from the periphery of AI infrastructure into the core of computing systems, getting closer to the heart of computing power.
/ 01 /
Light Enters Scale-Up: NPO Ushers in Industrialization Window
In recent years, the development of AI infrastructure has essentially been a race to expand computing scale.
From large-scale model training to multimodal systems and today's increasingly complex inference and agent systems, each step forward in model capabilities requires more computing power. As a result, AI infrastructure has evolved from standalone machines and single cards to clusters with thousands or even tens of thousands of cards.
However, as computing power scales further, new challenges arise.
In the past, the industry's primary concern was how fast a single GPU could compute. Advancing to the next process node would boost single-card performance, and scaling up with more GPUs would further increase overall computing power.
Today, this path is becoming increasingly difficult.
On one hand, performance gains from advanced process nodes are slowing, and the cost of boosting computing power on a single chip continues to rise. On the other hand, when dozens, hundreds, or even tens of thousands of XPUs are integrated into a single computing system, the overall performance is no longer determined solely by the chips themselves.
The ability to exchange data quickly between chips has become as important as computation itself. This is why, over the past two years, the competition in AI infrastructure has shifted from "single-chip performance" to "system-level efficiency."
NVIDIA's promotion of NVLink and NVSwitch, along with cloud providers launching 64-card, 128-card, or even larger supernodes, all aim to address the same challenge: how to connect an increasing number of XPUs so that dozens of chips can work together as seamlessly as one.
Scale-Up has thus become the core direction of this round of AI infrastructure upgrades. However, as Scale-Up continues to expand, another physical bottleneck emerges: materials.
Traditionally, short-distance interconnects within servers have relied on copper.
The reason is simple—copper is cheap and mature, making it the optimal choice for distances ranging from a few dozen centimeters to several meters. However, as SerDes speeds increase from 112G to 224G and eventually to 448G, the distance over which copper can reliably transmit signals continues to shrink.
This creates a new contradiction: the Scale-Up domain is growing, but copper's reach is shrinking.
When a supernode expands from a single motherboard to an entire rack or even spans multiple racks, relying solely on electrical interconnects is increasingly insufficient to meet next-generation bandwidth demands. Light is thus beginning to move from the periphery of data centers into the core of computing systems.
Currently, the most mainstream solution in data centers remains traditional pluggable optical modules.
These modules receive high-speed electrical signals from chips, perform electro-optical conversion, and transmit data via fiber optics. To ensure signal integrity at high speeds, many high-end optical modules today also incorporate oDSP for signal equalization, clock recovery, and restoration.
This approach works well in traditional networks but faces challenges in AI supernodes.
On one hand, as single-channel speeds increase from 100G to 200G and 400G, the power consumption, latency, and cost of oDSP rise accordingly. On the other hand, Scale-Up is a scenario characterized by "short distances, extremely high bandwidth, and extreme sensitivity to latency and power consumption," making traditional optical module designs increasingly impractical.
This has led to a new direction: moving light closer to the chip while minimizing intermediate electrical signal processing.
NPO, or Near-Packaged Optics, emerged in this context.
Compared to traditional pluggable optical modules, NPO places the optical engine near the XPU or switch chip, significantly reducing the distance high-speed electrical signals must travel on the motherboard. In some designs, the oDSP on the module side can also be eliminated or simplified, further reducing power consumption, latency, and cost.
However, removing the DSP does not simplify the product.
Some of the signal compensation capabilities previously handled by the DSP must now be redistributed to the TIA, Driver, and the entire high-speed analog link (link). The design of the optical chip, coordination with the electrical chip, and other tasks must all be considered holistically within a single system.
Thus, NPO places greater demands on vendors' optoelectronic collaboration and full-stack design capabilities, which is where its true technical barrier lies.
Taking this a step further is CPO, which integrates the optical engine deeper into the chip package, achieving even higher bandwidth density and lower power consumption. Many overseas vendors, such as NVIDIA and Broadcom, view CPO as a longer-term direction and are driving deeper integration of optical engines with switch chips.
However, this path is difficult to replicate directly in China.
On one hand, China has a more fragmented ecosystem of XPU vendors, making it challenging to unify chips, switches, and optical interconnects into a closed ecosystem like overseas giants. On the other hand, the bottlenecks for 224G and 448G high-speed interconnects in China are expected to emerge later than overseas, reducing the need to prematurely take on the complexity of CPO in terms of yield, packaging, and supply chain lock-in.
Under these circumstances, NPO has become a more practical choice.
It also brings light closer to the chip but retains modularity and supply chain decoupling: XPUs, switch chips, and optical components can evolve independently, and system vendors can maintain multiple supplier options while reducing yield and maintenance risks associated with optoelectronic co-packaging.
For China, NPO represents the optimal balance of performance, openness, and engineering feasibility under current industry conditions.
This is also why Alibaba launched its latest SNPO supernode—the Panjiu supernode server.
Existing NPO standards were primarily designed for switches, resulting in relatively large module sizes. However, in AI supernodes, optical modules need to fit into tighter spaces closer to the XPU, with higher bandwidth density, making the original designs inadequate.
As a result, Alibaba redefined a smaller, more supernode-friendly SNPO specification.
Unlike traditional NPO standards, Alibaba's SNPO supports 3.2T and 6.4T, with further reduced module sizes and about 25% higher bandwidth density than existing OIF specifications. Its interfaces can evolve from 112G and 224G to even higher speeds while accommodating high power consumption and liquid cooling.
Behind this is a broader shift: optical interconnects are taking on an increasingly important role in "computing infrastructure."
Alibaba's advancement of SNPO is one of the most visible signals of this change. However, for the industry, an even more noteworthy opportunity lies elsewhere: as light moves into the supernode, who else, beyond cloud and system vendors, can capture new value in this architectural shift?
The answer likely extends beyond traditional optical module vendors.
/ 02 /
Why Proximar Is Leading in SNPO Adoption
As NPO gains momentum, more vendors are showcasing related products at the Cloud Town Conference. For example, HGG showed its 6.4T NP solution.
Among these players, Proximar's approach is particularly noteworthy. At the conference, Proximar unveiled its SNPO products for XPU Scale-Up—a 3.2T/6.4T integrated silicon photonics transceiver chip.
This high-performance silicon photonics integrated chip integrates 16 independent 53Gbaud modulator channels and 16 independent 53Gbaud detector channels on a single die, capable of simultaneously transmitting and receiving high-speed optical signals.
However, beyond product specifications, Proximar's path into NPO is even more noteworthy.
Many companies in the industry are extending into NPO from traditional optical modules, high-speed interconnects, DSP, or electrical chip systems—essentially moving closer to "light" from their existing products.
Proximar, however, took a different route. It initially entered the field of optoelectronic hybrid computing.
To enable light to truly participate in computation, the company had to simultaneously address challenges in optical chips, electrical chips, high-speed interfaces, packaging, thermal management, and system coordination over the past few years. This process cultivated a relatively complete set of optoelectronic collaborative design capabilities.
But the deeper it delved, the more Proximar realized a critical issue: no matter how fast it could compute, if data couldn't move efficiently, performance would still be bottlenecked by interconnects.
Massive amounts of data must be continuously exchanged between on-chip compute cores and between chips. As computing power improves, connection efficiency quickly becomes the new bottleneck.
For this reason, Proximar began exploring early on how to use light for data transmission.
The reason Proximar could extend from optical computing to optical interconnects is that, while these fields serve different markets, their underlying engineering challenges are highly interconnected: both require solving optoelectronic collaboration, high-speed interfaces, packaging and thermal management, and system stability.
As a result, Proximar's technical roadmap gradually shifted from "computation" to "connection."
In 2023, the company launched OptiHummingbird, which used on-chip optical networks to provide high-bandwidth, low-latency data transmission for 64 compute cores.
By 2025, Proximar further extended optical interconnects from inside the chip to the entire computing system: it proposed the InfiniteHBD high-bandwidth domain architecture, introduced the LightSphere X optical interconnect super-switch, and completed the xPU-CPO optoelectronic co-packaging prototype system.
Thus, Proximar's entry into NPO today is not a sudden pivot from optical computing to optical interconnects but the result of a long-term strategic judgment.
For Proximar, this move means more than just adding another product—it truly expands its commercial boundaries.
Compared to optical computing, which is still in the early stages of industrialization, optical interconnects face a more certain demand.
As supernodes grow larger and Scale-Up bandwidth continues to rise, copper interconnects are approaching their physical limits. High-speed optical interconnect solutions like NPO and CPO are transitioning from technical options to genuine infrastructure requirements. Capital expenditures are also shifting toward this segment.
According to Bank of America estimates, the AI optical connectivity market will grow from approximately $14 billion in 2025 to about $73 billion in 2030, a nearly fivefold increase over five years, corresponding to a compound annual growth rate of about 39%. By 2030, optical connectivity is expected to account for about 71% of AI network ports.
This means that Proximar's bet on optoelectronic fusion is now entering a larger market that is closer to current AI capital expenditures. The company's product portfolio can expand from optoelectronic hybrid computing to broader AI infrastructure scenarios, including NPO, CPO, and memory interconnects.
Moreover, Proximar's presence at the Cloud Town Conference adds another layer of industrial significance.
Alibaba is introducing SNPO into its supernode architecture, while Proximar showcased its SNPO products for XPU Scale-Up. Meanwhile, vendors across the optical module and silicon photonics chip ecosystems are launching NPO-based products and solutions.
For a new technology still in the early stages of industrialization, such developments are significant signals. They indicate that optical interconnects are moving from technical exploration by a few companies into product validation and engineering implementation.
As supernodes continue to grow, the value center of gravity (center of gravity) in AI infrastructure is also shifting. If the winners of the previous AI computing power race were those who could provide more computation, the next round of opportunities may belong to those who can connect these computational capabilities more efficiently.
And that is perhaps why Proximar deserves a fresh look at this year's Cloud Town Conference.
By Aqi (Qi)