Open source has become a buzzword in the tech world.

A few years ago, the open-source RISC-V architecture emerged, stirring up waves in the chip design field with its open characteristics. Earlier this year, the open-source large model DeepSeek made a grand debut, adding fuel to the fire of AI.

Now, this wave of innovation has hit FPGA.

Recently, Zero ASIC, an American semiconductor startup, announced the launch of the world's first open-standard eFPGA IP product, Platypus.

According to the company, Platypus is the first and currently the only commercial eFPGA IP product with the following three key features: it adopts a 100% open and standardized FPGA architecture, provides a 100% open-source FPGA bitstream format, and comes with 100% open-source FPGA development tools.

Zero ASIC's origins can be traced back to Adapteva, founded in 2008, which focused on the development of parallel processors. In 2020, Andreas Olofsson, the founder of Adapteva, reassembled the team, renamed the company Zero ASIC, and received funding from the U.S. government to focus on the development of a composable chip platform.

Previously, Olofsson led the CHIPS project (Common Heterogeneous Integration and IP Reuse Strategies) at DARPA, laying the foundation for subsequent technological routes.

It is reported that Zero ASIC is building the world's first composable chip platform, enabling billions of unique silicon systems to be assembled from off-the-shelf chip catalogs within hours.

So, what is open-source FPGA? And what significance does it hold?

Open-source FPGA refers to FPGA technology whose hardware design, toolchain, or related ecosystem is released in an open-source format. Unlike traditional FPGAs (closed-source commercial products dominated by companies like Xilinx and Intel), the code, architecture, or development tools of open-source FPGAs are open to the public, allowing users to freely modify, customize, and share them.

Typical forms of open-source FPGA include open-source toolchains, open-source hardware architectures, and fully open-source FPGA designs.

The advantages of open-source FPGA are manifold:

First, in terms of cost, open-source FPGA can help developers avoid relying on the high licensing fees and tool subscription costs of commercial companies.

In terms of customization, developers can modify the FPGA architecture or toolchain to suit specific needs (such as custom instruction sets, optimizing power consumption), and the development speed can also be significantly accelerated.

In terms of security, traditional FPGAs rely on a single vendor's toolchain and chip, while the open-source ecosystem supports multi-platform compatibility.

In terms of lifecycle, commercial FPGAs may be phased out due to vendor discontinuation, while open-source projects can be maintained by the community, extending the hardware's lifespan.

Over the past 25 years, there have been numerous attempts to open up FPGA technology.

Osaka University in Japan is a key player in open-source FPGA projects. In May 1997, the Versatile Place and Route (VPR) open-source FPGA research platform was introduced, significantly lowering the barriers to high-quality, reproducible FPGA research.

The LNIS team at Osaka University has developed OpenFPGA, an open-source, comprehensive FPGA design and implementation framework. It is open-source on GitHub, supports highly customizable FPGA architectures, and provides a one-stop solution from Verilog to bitstream, making it ideal for chip designers and researchers. It is distributed under the MIT license, with some submodules outside the core codebase (such as VTR, Yosys, and Yosys plugins) following their respective licensing terms.

At the heart of OpenFPGA is the VPR tool, responsible for the placement and routing of FPGAs. VPR employs advanced algorithms that can optimize the placement of logic blocks, routing resource allocation, and power consumption control. By opening the source code, developers can directly participate in improving VPR, driving its performance and efficiency.

The core features of the project include:

• Verilog to Bitstream Generation: Allows users to compile designs directly into configuration bitstreams for specific FPGAs.
• Custom FPGA Architecture: Supports the creation and verification of personalized FPGA structures, pushing the boundaries of FPGA design innovation.
• Self-Testing and Verification: Integrated verification tools ensure design correctness, reducing the risk of errors.
• Agile Prototyping: Provides a rapid prototyping environment to accelerate research and development cycles.

It's worth noting that VPR is still a research tool, and there is still no fully open RTL-to-bitstream flow for commercial FPGAs.

To address the lack of fully open FPGA devices, DARPA funded the OpenFPGA and PRGA FPGA generator research projects in 2018. While these open-source generators have facilitated the tape-out of several academic chips, the final designs have neither been standardized nor commercialized.

There has never been an open and standardized commercial FPGA product on the market until now.

With the launch of the Platypus eFPGA series, Zero ASIC has taken a significant step towards standardized FPGA by publicly releasing the complete architectural description and bitstream format of its commercial Z1000 eFPGA IP under the open-source Apache license, aiming to make it an open standard.

Moreover, many organizations are extending their reach into other aspects of the open-source FPGA field. For example, FINN (Fast INtegration of Neural Networks) is an open-source project developed by Xilinx, focusing on efficient neural network inference on FPGAs. By leveraging the parallel processing capabilities of FPGAs, FINN can significantly accelerate the inference process of neural networks, making it particularly suitable for edge computing and real-time applications.

SymbiFlow is another open-source Verilog-to-bitstream FPGA synthesis flow, currently targeting Xilinx 7 series, Lattice iCE40, and Lattice ECP5 FPGAs. The project aims to design highly scalable and multi-platform tools. Through community collaboration, the open-source project SymbiFlow has supported open-source toolchains for multiple FPGAs, breaking the monopoly of traditional EDA tools.

In addition to FPGAs, the open-source trend is also penetrating other chip fields. For instance, in 2017, Microsemi began offering RISC-V soft cores in its FPGAs, followed by Lattice in 2020 and Intel (Altera) in 2021, with Xilinx being the last major vendor to do so, starting in May 2024.

Moreover, in October 2019, at the Wuzhen Internet Conference, T-Head, the chip company under Alibaba, announced the open-source design platform for low-power microcontroller chips (MCUs). Since then, T-Head has become the first domestic enterprise to achieve open-source chip platforms.

Similar to the advantages of open-source FPGA, open-source MCU offers higher flexibility and openness, lowering the barrier to entry into the embedded development field and enabling small teams or individual developers to access and use advanced MCU technology. Meanwhile, the flexibility of open-source MCU helps to better adapt to different market demands and application scenarios.

MCUs can be classified into 4-bit, 8-bit, 16-bit, and 32-bit. MCUs of different bit widths are suitable for different fields, with higher bit widths offering stronger data processing capabilities and being more suitable for complex application scenarios. Since the advent of MCUs in the 1970s, 8-bit MCUs have dominated the market. However, with the development of intelligent technologies such as the Internet of Things (IoT) and the improvement of cost competitiveness of 32-bit MCUs, the demand for 32-bit MCUs has grown rapidly. Since 2015, global shipments of 32-bit MCUs have exceeded the combined shipments of 4-bit, 8-bit, and 16-bit MCUs.

Today, technologies such as IoT, cloud computing, 5G, and AI are evolving rapidly. Against this backdrop, most IoT devices need to be equipped with the next generation of MCU chips to perform complex tasks such as sensing, communication, information processing, computing, and issuing control commands. The ability to support AI and cloud access is the biggest difference between the next generation of MCU chips and traditional MCU chips.

The MCU market based on the RISC-V instruction set architecture (ISA) is a new frontier.

In recent years, RISC-V MCUs have seen rapid development. Due to their openness and flexibility, they have found numerous applications in IoT, smart devices, automotive electronics, industrial control, and other compact, low-power, and cost-sensitive embedded systems. In particular, automotive electronics is considered the market with the most potential for future RISC-V MCU development.

According to statistics from SHD Group, global shipments of SoC products based on RISC-V cores reached 1.26 billion in 2023 and are expected to reach 2 billion in 2024, surpassing 20 billion by 2031. Among them, MCUs account for the largest share of shipments, with 617 million RISC-V MCUs shipped in 2023. It is estimated that shipments will reach 7.3 billion by 2030, with a compound annual growth rate of 42.4%.

RISC-V MCU suppliers and products in China and abroad have also seen significant development in recent years, with many companies having launched MCU products based on RISC-V cores. For example, GigaDevice launched and mass-produced 32-bit general-purpose MCU products based on RISC-V cores in 2019; Renesas Electronics also launched RISC-V MCUs, such as the R9A02G021; and Espressif Systems has introduced multiple MCU products supporting AI functions through its self-developed RISC-V 32-bit processor. Additionally, companies such as Qualcomm, NVIDIA, and Infineon are actively developing solutions based on RISC-V.

Recently, Infineon announced that it will launch a new series of automotive MCUs based on RISC-V in the coming years, leading the application of RISC-V in the automotive industry.

Compared to MCUs, the open-source journey for FPGAs is still in its early stages. However, insights into the future direction of FPGAs can be gleaned from the development path of MCUs.

First, let's look at the similarities and differences between FPGAs and MCUs:

• Product Characteristics: Both FPGAs and MCUs are programmable chips, but they differ in implementation. MCUs achieve functionality through software programming, making them suitable for executing fixed tasks (such as sensor control, simple algorithms); FPGAs achieve functionality through hardware logic reconfiguration, supporting parallel computing and complex algorithm acceleration, with higher flexibility.
• Application Scenarios: MCUs feature low power consumption and low cost, widely used in simple control scenarios such as home appliances and consumer electronics; FPGAs are suitable for high-performance computing (such as 5G signal processing, AI inference), hardware acceleration, and prototype verification in complex scenarios.
• Development Threshold: MCU development relies on C/C++ programming, with mature toolchains and a low entry barrier. FPGA development requires proficiency in hardware description languages (HDLs), with a complex design process and high requirements for engineers.

Looking ahead to the future direction of open-source FPGA, the current stage is still early exploration, with a large number of open-source IP cores emerging on platforms like GitHub, and corresponding toolchains gradually maturing. Targeting the needs of AI, IoT, and other fields, open-source FPGA can accelerate the implementation of customized solutions.

Will open-source FPGA become a future trend? And what benefits does it bring to domestic FPGA companies?

For domestic companies, as analyzed above, open source lowers technical barriers, attracts global developers to participate, accelerates technological iteration, and reduces reliance on international vendor IPs for open-source FPGA.

A detailed analysis shows:

• Technological Innovation: Open-source communities contribute IP cores, allowing domestic vendors to quickly integrate them, shortening the product time-to-market. Open-source toolchains also support hardware tailoring, enabling domestic FPGAs to optimize power consumption and performance for specific scenarios (such as edge computing).
• Cost Reduction: Open-source EDA tools can replace expensive commercial tools, lowering R&D costs. Reusing open-source IPs reduces redundant development, allowing companies to focus on core technological innovation.

Therefore, open-source FPGA provides a differentiated competitive path for domestic FPGA vendors. Writing here, some may ask, if so, why has the development of open-source FPGA been much slower than that of MCUs?

As we all know, developing FPGAs is challenging, with high barriers to hardware design, performance bottlenecks in open-source toolchains, fragmented ecosystems, and the influence of mainstream FPGA vendors' profit models, all of which can hinder the progress of open-source FPGA. It is certain that open-source FPGA has the potential to become a key infrastructure for hardware innovation, but more efforts are needed from all sectors of the industry.